PXIe Model GX3800e


The GX3800e is a user configurable, FPGA-based, 3U PXI Express card which supports the 400 pin, VITA 57.1 FMC interface standard. The card employs the Altera Cyclone V GX FPGA, which supports xcvr data rates up to 3.125 Gb/s and features over 300,000 logic elements and 12.2 Kb of memory.  Users can design their own custom interface module or select from a wide range of commercial off the shelf FMC modules which can then be integrated with the GX3800e - creating customized instrumentation for analog or digital test applications.  The design of the FPGA is done by using Altera’s Quartus or the license free Quartus Prime Lite tool set. 


The GX3800e's 400 pin FMC interface features 80 differential pairs, 4 differential clocks, (10) 3.125 Gbs xcvrs, two xcvr clocks, an I2C control interface, JTAG bus, and power / gnd connections. The FPGA device supports up to eight phase lock loops for clock synthesis, clock generation and for support of the I/O interface. Additional module resources include:

  • 64M x 32 of DDR memory
  • 32M x 16 of flash memory (for defined core functions)
  • Programmable clock generators
  • DMA controller

The module has access to all of the PXI Express bus resources including the PXI 10 MHz clock, PXIe 100 MHz clock, PXIe Sync100, PXIe DStar triggers, the local bus, and the PXI triggers; allowing the user to create a custom instrument which incorporates all of the PXI Express bus resources. 

Control and access to the FPGA is provided via the GX3800e's driver which includes DMA and interrupt support, tools for downloading the compiled FPGA code, and register read and write functionality. The GX3800e's unique architecture partitions the PCIe interface separately from the user FPGA - eliminating the need for the user to incorporate the PCIe interface as part of his or her overall FPGA design. Access to the user FPGA is via an internal address and data bus with predefined registers which are supported by the module’s software driver and an interactive UI. The result is a simplified design / integration process since both the PCIe bus interface and associated software driver are known, tested entities.

Programming and Software

The board is supplied with the GXFPGA library, a software package that includes a virtual instrument panel, and a Windows 32/64-bit DLL driver library and documentation. The virtual panel can be used to interactively program and control the instrument from a window that displays the instrument’s current settings and status. In addition, interface files are provided to support access to programming tools and languages such as ATEasy®, LabVIEW, LabVIEW/Real-Time, C/C++, Microsoft Visual Basic®, Delphi, and Pascal. An On-Line help file and PDF User's Guide provides documentation that includes instructions for installing, using and programming the board. Once the user has compiled the FPGA design, the configuration file can be loaded directly into the FPGA or via on-board flash memory.

A separate software package - GtLinux - provides support for Linux 32/64 operating systems.


  • Automatic Test Equipment (ATE)
  • Semiconductor test
  • Custom interface emulation
  • Custom instrumentation
  • SerDes interfaces

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